Just Another Big-Bandwidth Event-Recorder With Oscilloscope Capabilities
This page describes the design decisions and specifications of a portable (handheld, battery-powered) digital oscilloscope. Development on the oscilloscope was started in January, 2008. The oscilloscope is based on a LABRADOR3 ASIC, which was developed at the University of Hawaii / department of physics / instrumentation development lab.
- 2008-06-08 all the parts are in; everything except the labrador3 is soldered down; the microcontroller boots and runs the oscilloscope program and displays a fake trace on the screen.
- 2008-05-16 most of the parts came in and have been soldered to the circuit board – still missing the 3.3V buck-boost regulator and the microcontroller’s oscillator.
- 2008-05 the board has been fabricated
- 2008-04 the board design is finished
- 2008-04 the schematic is finished
- 2008-03 project scope finalized (no pun intended)
- 2008-01 project started; part selection
The oscilloscope is battery (rechargable LiPoly) or usb powered, has 2 channels of input (DC coupled only), has a 128×124 pixel color OLED display. It supports (slightly) advanced triggering or an optional trigger-delay.
The input impedance of this scope is 1MOhm. The analog bandwidth is unknown at this point (and will be until the project is nearly complete). The lab3 can sample billions of times per second, but this oscilloscope will probably only be useful at a much much lower sampling speed. This is due to the choice of input amplifier and multiplexer: The multiplexer has a bandwidth of about 700MHz as does the voltage-feedback operational amplifier.
The AtoD converter is called a “labrador3″ or just “lab3,” and it is an ASIC that was designed for use in ANITA, an antarctic neutrino detector experiment.
It has 9 channels and holds 260 samples per channel in a switched capacitor array that can run at up to . When a trigger comes, it converts all samples to digital values with 2340 parallel Wilkinson analog to digital converters ().
The LABRADOR3 is a 9-channel high-speed 12-bit analog-to-digital converter with a narrow buffer (260 samples per channel). It has two modes of operation:
- First, it acts as a 3.7GSa/s 9-channel switched-capacitor buffer. This array of sample-and-hold capacitors stores charge for later analog-to-digital conversion and gets overwritten in a circular fashion until the desired data is in the buffer, at which time it stops collecting data.
- The next mode is the Wilkinson analog-to-digital (AtoD) conversion stage. Each Wilkinson AtoD converter is an analog comparator with a 12 bit latch which stores the gray code corresponding to the voltage on the capacitor. This occurs simultaneously for all 2,340 samples.
After the data is converted into digital values, the data can be read out by a microcontroller or FPGA in a random fashion via an address and data bus.
The advantage of sampling this way is that high-speed sampling can be achieved using relatively little power (a few hundred milliWatts for all 9 channels being converted simultaneously). The disadvantage is that it can’t sample data continuously.
The LABRADOR3 is capable of sampling up to 3.7 x 10^9 times per second, leading to a timing measurement precision of approximately 0.27ns. The analog bandwidth, however, is limited to about 900MHz.
The LABRADOR3 is a single-supply AtoD converter and requires 2.5VDC. It comes in a QFP-100.
The main reason to have anything but a resistive divider on the front-end of the oscilloscope is that the lab3 can only digitize voltages between 0.5V and 2.0V. In the neutrino detector experiment, the input was ac coupled and then a 1.25V DC bias voltage was set up on the input to the lab3, so there was no problem. In a general-purpose oscilloscope, however, one frequently wants to see the DC offset of a given signal, so the choice was made to make the input DC-coupled and use a summing amplifier to add 1.25V to the (attenuated) signal. This severely constrains the analog bandwidth of the scope, as there are no very-high bandwidth multiplexers which work with positive AND negative voltage swings.
In order to measure a greater dynamic range and allow the input voltages to swing negative, an operational amplifier is used in a summing configuration (to add a 1.25VDC offset) with an array of voltage-dividers and a multiplexer to choose the gain for the input signal. This allows a course adjustment so that “high” voltages (+-64V) can be digitized as well as “low” voltages (a few mV, just above the noise floor for the lab3) using just 12 bits of resolution.
The input stage is high-impedance (4 sets of 4MOhm resistive dividers in parallel going into a 4to1 multiplexer) and has schottky protection diode pairs that limit the voltage going into the multiplexer to about +-(0.75V+the diode’s forward voltage), so a relatively high-voltage input should not destroy the device, since the current that develops through the high resistance is very small (~71uA for a 177V input signal across a 2.5MOhm resistor, the top of one of the resistive dividers). The IV curve for the schottkys that I picked doesn’t even show anything below 10,000uA and the forward voltage in that case is 0.24V, so the input to the multiplexer should never see more than +-1V.
microcontroller and display
The microcontroller is an Atmel AT91SAM7A3 and runs up to 60MHz (although will probably be constrained to run at 48MHz so that the necessary clocks for the USB interface can be generated.
The 128×124 pixel display is easily capable of showing two traces with 10 horizontal divisions and 8 vertical divisions along with ancillary information about each trace.
There are 2 rotary encoders and 4 general purpose buttons. The rotary encoders are to select the vertical and horizontal scales and offsets.
The board has 2 layers and is 99.5mm X 79.5mm. The trace width / trace spacing / hole diameter is 6/6/15 (in mils). There are 771 SMD pads on the top, 196 SMD pads on the bottom and 392 holes drilled, total and the board is ~12 square inches.
still to to
At this point, there is some preliminary software running on the device to capture a trace with the microcontroller’s onboard AtoD converter and display it and allow selection of vertical scale, vertical offset and horizontal scale. Software to control the external trigger-delay has been written and tested. Further software must be written to get data from the lab3 and control the DACs. After that is complete, bandwidth & slew-rate testing will be carried out.